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authorZhou Wang <wangzhou1@hisilicon.com>2019-08-02 09:57:53 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2019-08-09 07:11:54 +0200
commit79e09f30eeba857b09832209bfc66bd689c58328 (patch)
treec4469306b81902094e4ba73ac396c2d7ca7a84b8 /drivers/crypto/hisilicon/qm.h
parentcrypto: hisilicon - add HiSilicon ZIP accelerator support (diff)
downloadlinux-79e09f30eeba857b09832209bfc66bd689c58328.tar.xz
linux-79e09f30eeba857b09832209bfc66bd689c58328.zip
crypto: hisilicon - add SRIOV support for ZIP
HiSilicon ZIP engine supports PCI SRIOV. This patch enable this feature. User can enable VFs and pass through them to VM, same ZIP driver can work in VM to provide ZLIB and GZIP algorithm by crypto acomp interface. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/qm.h')
-rw-r--r--drivers/crypto/hisilicon/qm.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/crypto/hisilicon/qm.h b/drivers/crypto/hisilicon/qm.h
index a5849db163cb..8b3cb69dffca 100644
--- a/drivers/crypto/hisilicon/qm.h
+++ b/drivers/crypto/hisilicon/qm.h
@@ -80,6 +80,7 @@ enum qm_hw_ver {
enum qm_fun_type {
QM_HW_PF,
+ QM_HW_VF,
};
struct qm_dma {
@@ -98,6 +99,7 @@ struct hisi_qm_status {
struct hisi_qm {
enum qm_hw_ver ver;
+ enum qm_fun_type fun_type;
const char *dev_name;
struct pci_dev *pdev;
void __iomem *io_base;
@@ -174,7 +176,9 @@ int hisi_qm_start_qp(struct hisi_qp *qp, unsigned long arg);
int hisi_qm_stop_qp(struct hisi_qp *qp);
void hisi_qm_release_qp(struct hisi_qp *qp);
int hisi_qp_send(struct hisi_qp *qp, const void *msg);
+int hisi_qm_get_vft(struct hisi_qm *qm, u32 *base, u32 *number);
int hisi_qm_set_vft(struct hisi_qm *qm, u32 fun_num, u32 base, u32 number);
+int hisi_qm_debug_init(struct hisi_qm *qm);
void hisi_qm_hw_error_init(struct hisi_qm *qm, u32 ce, u32 nfe, u32 fe,
u32 msi);
int hisi_qm_hw_error_handle(struct hisi_qm *qm);