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authorShukun Tan <tanshukun1@huawei.com>2020-05-09 11:44:03 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2020-05-15 08:15:03 +0200
commit3176637ac10eddffdc3bd75281fa354a0d5a0c1e (patch)
tree01a582303542308c5ed017c1978f15517c38d6e6 /drivers/crypto/hisilicon/sec2
parentcrypto: hisilicon - QM memory management optimization (diff)
downloadlinux-3176637ac10eddffdc3bd75281fa354a0d5a0c1e.tar.xz
linux-3176637ac10eddffdc3bd75281fa354a0d5a0c1e.zip
crypto: hisilicon - remove codes of directly report device errors through MSI
The hardware device can be configured to report directly through MSI, but this method will not go through RAS, configure all hardware errors that should be processed by driver to NFE. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/sec2')
-rw-r--r--drivers/crypto/hisilicon/sec2/sec_main.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 74e806fd9ff9..c3381f253d55 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -682,7 +682,6 @@ static const struct hisi_qm_err_ini sec_err_ini = {
.nfe = QM_BASE_NFE | QM_ACC_DO_TASK_TIMEOUT |
QM_ACC_WB_NOT_READY_TIMEOUT,
.fe = 0,
- .msi = QM_DB_RANDOM_INVALID,
.ecc_2bits_mask = SEC_CORE_INT_STATUS_M_ECC,
.msi_wr_port = BIT(0),
.acpi_rst = "SRST",