diff options
| author | Srujana Challa <schalla@marvell.com> | 2023-12-13 08:30:48 +0100 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2023-12-29 04:25:38 +0100 |
| commit | 92508e7fcffdd77d6e2a18d3dd9c8863f61b040f (patch) | |
| tree | a6f4683c537b790eb5b6ac09c4c74da975509f55 /drivers/crypto/marvell/octeontx2/cn10k_cpt.h | |
| parent | crypto: octeontx2 - remove CPT block reset (diff) | |
| download | linux-92508e7fcffdd77d6e2a18d3dd9c8863f61b040f.tar.xz linux-92508e7fcffdd77d6e2a18d3dd9c8863f61b040f.zip | |
crypto: octeontx2 - add SGv2 support for CN10KB or CN10KA B0
Scatter Gather input format for CPT has changed on CN10KB/CN10KA B0 HW
to make it compatible with NIX Scatter Gather format to support SG mode
for inline IPsec. This patch modifies the code to make the driver works
for the same. This patch also enables CPT firmware load for these chips.
Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/marvell/octeontx2/cn10k_cpt.h')
| -rw-r--r-- | drivers/crypto/marvell/octeontx2/cn10k_cpt.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/crypto/marvell/octeontx2/cn10k_cpt.h b/drivers/crypto/marvell/octeontx2/cn10k_cpt.h index aaefc7e38e06..44805a0717d7 100644 --- a/drivers/crypto/marvell/octeontx2/cn10k_cpt.h +++ b/drivers/crypto/marvell/octeontx2/cn10k_cpt.h @@ -30,5 +30,6 @@ static inline u8 otx2_cpt_get_uc_compcode(union otx2_cpt_res_s *result) int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf); int cn10k_cptvf_lmtst_init(struct otx2_cptvf_dev *cptvf); +void cptvf_hw_ops_get(struct otx2_cptvf_dev *cptvf); #endif /* __CN10K_CPTLF_H */ |