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author | Dan Williams <dan.j.williams@intel.com> | 2022-03-15 02:22:33 +0100 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2022-04-13 04:11:58 +0200 |
commit | fbaf2b079d2a0a9c7114fbd4d1c0f3dd7a3cb3ad (patch) | |
tree | 486c3fb2116b76fa06636da11dab3027d4049b09 /drivers/cxl/mem.c | |
parent | cxl/pci: Add debug for DVSEC range init failures (diff) | |
download | linux-fbaf2b079d2a0a9c7114fbd4d1c0f3dd7a3cb3ad.tar.xz linux-fbaf2b079d2a0a9c7114fbd4d1c0f3dd7a3cb3ad.zip |
cxl/mem: Make cxl_dvsec_range() init failure fatal
In preparation for the cxl_pci driver to continue operation after
cxl_dvsec_range() failure, update cxl_mem to check for negative error
codes in info->ranges. Treat that condition as fatal regardless of the
state of the HDM configuration since cxl_mem needs positive confirmation
that legacy ranges were not established by platform firmware or another
agent.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com.
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
Link: https://lore.kernel.org/r/164730735324.3806189.4167509857771192422.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to '')
-rw-r--r-- | drivers/cxl/mem.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index cd4e8bba82aa..50704deb2ff0 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -88,6 +88,9 @@ __mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds) void __iomem *crb; u32 global_ctrl; + if (info->ranges < 0) + return false; + /* map hdm decoder */ crb = ioremap(cxlds->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE); if (!crb) { |