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authorDan Williams <dan.j.williams@intel.com>2022-08-05 22:27:40 +0200
committerDan Williams <dan.j.williams@intel.com>2022-08-06 01:10:03 +0200
commit910bc55da8285605308cb76f69a335b36780da43 (patch)
treecc4d647a0812d3858c45841b081273feabe63554 /drivers/cxl
parentcxl/region: Fix decoder interleave programming (diff)
downloadlinux-910bc55da8285605308cb76f69a335b36780da43.tar.xz
linux-910bc55da8285605308cb76f69a335b36780da43.zip
cxl/region: Move HPA setup to cxl_region_attach()
A recent bug fix added the setup of the endpoint decoder interleave geometry settings to cxl_region_attach(). Move the HPA setup there as well to keep all endpoint decoder parameter setting in a central location. For symmetry, move endpoint HPA teardown to cxl_region_detach(), and for switches move HPA setup / teardown to cxl_port_{setup,reset}_targets(). Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Vishal Verma <vishal.l.verma@intel.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/165973126020.1526540.14701949254436069807.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl')
-rw-r--r--drivers/cxl/core/hdm.c26
-rw-r--r--drivers/cxl/core/region.c24
2 files changed, 24 insertions, 26 deletions
diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index 8143e2615957..e096f74e19df 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -499,28 +499,6 @@ static void cxld_set_type(struct cxl_decoder *cxld, u32 *ctrl)
CXL_HDM_DECODER0_CTRL_TYPE);
}
-static void cxld_set_hpa(struct cxl_decoder *cxld, u64 *base, u64 *size)
-{
- struct cxl_region *cxlr = cxld->region;
- struct cxl_region_params *p = &cxlr->params;
-
- cxld->hpa_range = (struct range) {
- .start = p->res->start,
- .end = p->res->end,
- };
-
- *base = p->res->start;
- *size = resource_size(p->res);
-}
-
-static void cxld_clear_hpa(struct cxl_decoder *cxld)
-{
- cxld->hpa_range = (struct range) {
- .start = 0,
- .end = -1,
- };
-}
-
static int cxlsd_set_targets(struct cxl_switch_decoder *cxlsd, u64 *tgt)
{
struct cxl_dport **t = &cxlsd->target[0];
@@ -601,7 +579,8 @@ static int cxl_decoder_commit(struct cxl_decoder *cxld)
ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(cxld->id));
cxld_set_interleave(cxld, &ctrl);
cxld_set_type(cxld, &ctrl);
- cxld_set_hpa(cxld, &base, &size);
+ base = cxld->hpa_range.start;
+ size = range_len(&cxld->hpa_range);
writel(upper_32_bits(base), hdm + CXL_HDM_DECODER0_BASE_HIGH_OFFSET(id));
writel(lower_32_bits(base), hdm + CXL_HDM_DECODER0_BASE_LOW_OFFSET(id));
@@ -674,7 +653,6 @@ static int cxl_decoder_reset(struct cxl_decoder *cxld)
ctrl &= ~CXL_HDM_DECODER0_CTRL_COMMIT;
writel(ctrl, hdm + CXL_HDM_DECODER0_CTRL_OFFSET(id));
- cxld_clear_hpa(cxld);
writel(0, hdm + CXL_HDM_DECODER0_SIZE_HIGH_OFFSET(id));
writel(0, hdm + CXL_HDM_DECODER0_SIZE_LOW_OFFSET(id));
writel(0, hdm + CXL_HDM_DECODER0_BASE_HIGH_OFFSET(id));
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 40f04c543e41..e71077beb021 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -1044,6 +1044,10 @@ static int cxl_port_setup_targets(struct cxl_port *port,
cxld->interleave_ways = iw;
cxld->interleave_granularity = ig;
+ cxld->hpa_range = (struct range) {
+ .start = p->res->start,
+ .end = p->res->end,
+ };
dev_dbg(&cxlr->dev, "%s:%s iw: %d ig: %d\n", dev_name(port->uport),
dev_name(&port->dev), iw, ig);
add_target:
@@ -1070,13 +1074,21 @@ static void cxl_port_reset_targets(struct cxl_port *port,
struct cxl_region *cxlr)
{
struct cxl_region_ref *cxl_rr = cxl_rr_load(port, cxlr);
+ struct cxl_decoder *cxld;
/*
* After the last endpoint has been detached the entire cxl_rr may now
* be gone.
*/
- if (cxl_rr)
- cxl_rr->nr_targets_set = 0;
+ if (!cxl_rr)
+ return;
+ cxl_rr->nr_targets_set = 0;
+
+ cxld = cxl_rr->decoder;
+ cxld->hpa_range = (struct range) {
+ .start = 0,
+ .end = -1,
+ };
}
static void cxl_region_teardown_targets(struct cxl_region *cxlr)
@@ -1257,6 +1269,10 @@ static int cxl_region_attach(struct cxl_region *cxlr,
cxled->cxld.interleave_ways = p->interleave_ways;
cxled->cxld.interleave_granularity = p->interleave_granularity;
+ cxled->cxld.hpa_range = (struct range) {
+ .start = p->res->start,
+ .end = p->res->end,
+ };
return 0;
@@ -1315,6 +1331,10 @@ static int cxl_region_detach(struct cxl_endpoint_decoder *cxled)
}
p->targets[cxled->pos] = NULL;
p->nr_targets--;
+ cxled->cxld.hpa_range = (struct range) {
+ .start = 0,
+ .end = -1,
+ };
/* notify the region driver that one of its targets has departed */
up_write(&cxl_region_rwsem);