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authorHongbo Zhang <hongbo.zhang@freescale.com>2014-01-16 07:10:53 +0100
committerVinod Koul <vinod.koul@intel.com>2014-01-20 08:43:22 +0100
commit0ca583a239a854fd403bf8b659cdff8c603372c9 (patch)
treea495b019353c869454da1942965955eb38cdbfc6 /drivers/dio/dio.c
parentdmaengine: Add MOXA ART DMA engine driver (diff)
downloadlinux-0ca583a239a854fd403bf8b659cdff8c603372c9.tar.xz
linux-0ca583a239a854fd403bf8b659cdff8c603372c9.zip
DMA: Freescale: change BWC from 256 bytes to 1024 bytes
Freescale DMA has a feature of BandWidth Control (ab. BWC), which is currently 256 bytes and should be changed to 1024 bytes for best DMA throughput. Changing BWC from 256 to 1024 will improve DMA performance much, in cases whatever one channel is running or multi channels are running simultanously, large or small buffers are copied. And this change doesn't impact memory access performance remarkably, lmbench tests show that for some cases the memory performance are decreased very slightly, while the others are even better. Tested on T4240. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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