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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-01-17 12:57:32 +0100 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2017-01-25 07:21:40 +0100 |
| commit | f7c799e950f96191a16f18606e43e6f861b2a361 (patch) | |
| tree | 2ec2e9bc483f1e0120f8b02cb338731428d4172b /drivers/dma/dw/pci.c | |
| parent | dmaengine: dw: add support of iDMA 32-bit hardware (diff) | |
| download | linux-f7c799e950f96191a16f18606e43e6f861b2a361.tar.xz linux-f7c799e950f96191a16f18606e43e6f861b2a361.zip | |
dmaengine: dw: we do support Merrifield SoC in PCI mode
Intel Merrifield platform contains Intel integrated DMA (iDMA 32-bit) which has
a slightly different register mapping, e.g. some bits in CTL_* and CFG_*
channel registers, and has to use platform data since there is no
autoconfiguration.
The iDMA 32-bit specification is available in the publicly available
documentation for Intel Braswell and BayTrail SoCs as LPE Audio DMA.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/dw/pci.c')
| -rw-r--r-- | drivers/dma/dw/pci.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c index 47194372f738..7778ed705a1a 100644 --- a/drivers/dma/dw/pci.c +++ b/drivers/dma/dw/pci.c @@ -15,6 +15,18 @@ #include "internal.h" +static struct dw_dma_platform_data mrfld_pdata = { + .nr_channels = 8, + .is_private = true, + .is_memcpy = true, + .is_idma32 = true, + .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, + .chan_priority = CHAN_PRIORITY_ASCENDING, + .block_size = 131071, + .nr_masters = 1, + .data_width = {4}, +}; + static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid) { const struct dw_dma_platform_data *pdata = (void *)pid->driver_data; @@ -103,6 +115,9 @@ static const struct pci_device_id dw_pci_id_table[] = { { PCI_VDEVICE(INTEL, 0x0f06) }, { PCI_VDEVICE(INTEL, 0x0f40) }, + /* Merrifield iDMA 32-bit (GPDMA) */ + { PCI_VDEVICE(INTEL, 0x11a2), (kernel_ulong_t)&mrfld_pdata }, + /* Braswell */ { PCI_VDEVICE(INTEL, 0x2286) }, { PCI_VDEVICE(INTEL, 0x22c0) }, |