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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2019-01-07 12:07:38 +0100
committerVinod Koul <vkoul@kernel.org>2019-01-07 13:27:13 +0100
commit69da8be90d5e85e60b5377c47384154b9dabf592 (patch)
treeb83e230892a29f80ff1619823a5f1275375b199c /drivers/dma/dw/regs.h
parentdmaengine: dw: Remove unused internal property (diff)
downloadlinux-69da8be90d5e85e60b5377c47384154b9dabf592.tar.xz
linux-69da8be90d5e85e60b5377c47384154b9dabf592.zip
dmaengine: dw: Split DW and iDMA 32-bit operations
Here is a kinda big refactoring that should have been done in the first place, when Intel iDMA 32-bit support appeared. It splits operations which are different to Synopsys DesignWare and Intel iDMA 32-bit controllers. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/dw/regs.h')
-rw-r--r--drivers/dma/dw/regs.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
index 646c9c960c07..66aa8b227248 100644
--- a/drivers/dma/dw/regs.h
+++ b/drivers/dma/dw/regs.h
@@ -312,6 +312,19 @@ struct dw_dma {
u8 all_chan_mask;
u8 in_use;
+ /* Channel operations */
+ void (*initialize_chan)(struct dw_dma_chan *dwc);
+ void (*suspend_chan)(struct dw_dma_chan *dwc, bool drain);
+ void (*encode_maxburst)(struct dw_dma_chan *dwc, u32 *maxburst);
+ u32 (*bytes2block)(struct dw_dma_chan *dwc, size_t bytes,
+ unsigned int width, size_t *len);
+ size_t (*block2bytes)(struct dw_dma_chan *dwc, u32 block, u32 width);
+
+ /* Device operations */
+ void (*set_device_name)(struct dw_dma *dw, int id);
+ void (*disable)(struct dw_dma *dw);
+ void (*enable)(struct dw_dma *dw);
+
/* platform data */
struct dw_dma_platform_data *pdata;
};