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authorVinod Koul <vinod.koul@intel.com>2013-06-12 10:09:57 +0200
committerVinod Koul <vinod.koul@intel.com>2013-07-05 08:10:46 +0200
commite368b510c01aaf7b2957306836ffdeacc24712a3 (patch)
tree634a8da8326eae909bbf66fd256c1e71ff74a3f5 /drivers/dma/dw/regs.h
parentdma: dw: add PCI part of the driver (diff)
downloadlinux-e368b510c01aaf7b2957306836ffdeacc24712a3.tar.xz
linux-e368b510c01aaf7b2957306836ffdeacc24712a3.zip
dmaengine: dw: select DW_DMAC_BIG_ENDIAN_IO automagically
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/dw/regs.h')
-rw-r--r--drivers/dma/dw/regs.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
index 07c5a6ecb52b..deb4274f80f4 100644
--- a/drivers/dma/dw/regs.h
+++ b/drivers/dma/dw/regs.h
@@ -101,6 +101,12 @@ struct dw_dma_regs {
u32 DW_PARAMS;
};
+/*
+ * Big endian I/O access when reading and writing to the DMA controller
+ * registers. This is needed on some platforms, like the Atmel AVR32
+ * architecture.
+ */
+
#ifdef CONFIG_DW_DMAC_BIG_ENDIAN_IO
#define dma_readl_native ioread32be
#define dma_writel_native iowrite32be