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| author | Tejun Heo <tj@kernel.org> | 2010-12-17 15:16:46 +0100 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2010-12-17 15:16:46 +0100 |
| commit | 275c8b93288ef0c2281e414e069ea8ed4bad03f7 (patch) | |
| tree | df906ef901d7719d66944921c7436f5db718dc2f /drivers/dma/fsldma.h | |
| parent | core: Replace __get_cpu_var with __this_cpu_read if not used for an address. (diff) | |
| parent | x86: Support for this_cpu_add, sub, dec, inc_return (diff) | |
| download | linux-275c8b93288ef0c2281e414e069ea8ed4bad03f7.tar.xz linux-275c8b93288ef0c2281e414e069ea8ed4bad03f7.zip | |
Merge branch 'this_cpu_ops' into for-2.6.38
Diffstat (limited to 'drivers/dma/fsldma.h')
| -rw-r--r-- | drivers/dma/fsldma.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h index cb4d6ff51597..ba9f403c0fbe 100644 --- a/drivers/dma/fsldma.h +++ b/drivers/dma/fsldma.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved. * * Author: * Zhang Wei <wei.zhang@freescale.com>, Jul 2007 @@ -36,6 +36,13 @@ #define FSL_DMA_MR_DAHE 0x00002000 #define FSL_DMA_MR_SAHE 0x00001000 +/* + * Bandwidth/pause control determines how many bytes a given + * channel is allowed to transfer before the DMA engine pauses + * the current channel and switches to the next channel + */ +#define FSL_DMA_MR_BWC 0x08000000 + /* Special MR definition for MPC8349 */ #define FSL_DMA_MR_EOTIE 0x00000080 #define FSL_DMA_MR_PRC_RM 0x00000800 |