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authorDave Jiang <dave.jiang@intel.com>2021-04-20 20:46:28 +0200
committerVinod Koul <vkoul@kernel.org>2021-04-23 19:38:44 +0200
commit8c66bbdc4fbf3c297ebc8edf71f359e4a132c9db (patch)
tree9fadc8cc3e90063bbe92611152bae3001ace2216 /drivers/dma/idxd/init.c
parentdmaengine: idxd: add percpu_ref to descriptor submission path (diff)
downloadlinux-8c66bbdc4fbf3c297ebc8edf71f359e4a132c9db.tar.xz
linux-8c66bbdc4fbf3c297ebc8edf71f359e4a132c9db.zip
dmaengine: idxd: add support for readonly config mode
The read-only configuration mode is defined by the DSA spec as a mode of the device WQ configuration. When GENCAP register bit 31 is set to 0, the device is in RO mode and group configuration and some fields of the workqueue configuration registers are read-only and reflect the fixed configuration of the device. Add support for RO mode. The driver will load the values from the registers directly setup all the internally cached data structures based on the device configuration. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/161894438847.3202472.6317563824045432727.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/idxd/init.c')
-rw-r--r--drivers/dma/idxd/init.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c
index eda5ffd307c6..a07e6d8eec00 100644
--- a/drivers/dma/idxd/init.c
+++ b/drivers/dma/idxd/init.c
@@ -482,6 +482,14 @@ static int idxd_probe(struct idxd_device *idxd)
if (rc)
goto err;
+ /* If the configs are readonly, then load them from device */
+ if (!test_bit(IDXD_FLAG_CONFIGURABLE, &idxd->flags)) {
+ dev_dbg(dev, "Loading RO device config\n");
+ rc = idxd_device_load_config(idxd);
+ if (rc < 0)
+ goto err;
+ }
+
rc = idxd_setup_interrupts(idxd);
if (rc)
goto err;