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authorDave Jiang <dave.jiang@intel.com>2016-03-11 00:18:40 +0100
committerVinod Koul <vinod.koul@intel.com>2016-03-11 03:25:08 +0100
commitc997e30e7f65f00832abc5d92f7fd3d6ca325402 (patch)
treefc26ea33c4176b5fe81af07a8e4ff8f8e6171dfd /drivers/dma/ioat/dma.h
parentdmaengine: IOATDMA: Allocate DMA descriptor ring in contig DMA memory (diff)
downloadlinux-c997e30e7f65f00832abc5d92f7fd3d6ca325402.tar.xz
linux-c997e30e7f65f00832abc5d92f7fd3d6ca325402.zip
dmaengine: IOATDMA: revise channel reset workaround on CB3.3 platforms
Previously we unloaded the interrupts and reloaded in order to work around a channel reset bug that cleared the MSIX table. This approach just isn't practical when a reset needs to happen in the error handler that just happens to be running in interrupt context (bottom half). It looks like we can work around the hardware issue by just storing a shadow copy of the MSIX table and restore it after reset. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/ioat/dma.h')
-rw-r--r--drivers/dma/ioat/dma.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index 57a9b83db455..a9bc1a15b0d1 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -86,6 +86,11 @@ struct ioatdma_device {
struct dca_provider *dca;
enum ioat_irq_mode irq_mode;
u32 cap;
+
+ /* shadow version for CB3.3 chan reset errata workaround */
+ u64 msixtba0;
+ u64 msixdata0;
+ u32 msixpba;
};
struct ioat_descs {