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authorMatthieu CASTET <matthieu.castet@parrot.com>2014-02-19 06:46:31 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-02-21 21:34:45 +0100
commit5bf5dbeda2454296f1984adfbfc8e6f5965ac389 (patch)
treec7464044ff490053cba826f45a804de2f9a8fb64 /drivers/dma/mv_xor.h
parentMerge tag 'fixes-for-v3.14-rc4' of git://git.kernel.org/pub/scm/linux/kernel/... (diff)
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usb: chipidea: need to mask when writting endptflush and endptprime
ENDPTFLUSH and ENDPTPRIME registers are set by software and clear by hardware. There is a bit for each endpoint. When we are setting a bit for an endpoint we should make sure we do not touch other endpoint bit. There is a race condition if the hardware clear the bit between the read and the write in hw_write. Cc: stable <stable@vger.kernel.org> # 3.11+ Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Tested-by: Michael Grzeschik <mgrzeschik@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/dma/mv_xor.h')
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