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author | Viresh Kumar <viresh.kumar@st.com> | 2011-03-04 10:28:32 +0100 |
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committer | Vinod Koul <vinod.koul@intel.com> | 2011-03-06 20:42:28 +0100 |
commit | 29782da5f0206335e2325508ba4fee0d624ddab6 (patch) | |
tree | e9398004d1647b7082b86dcc392999de69e8e16b /drivers/dma/pch_dma.c | |
parent | avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize (diff) | |
download | linux-29782da5f0206335e2325508ba4fee0d624ddab6.tar.xz linux-29782da5f0206335e2325508ba4fee0d624ddab6.zip |
dmaengine/dw_dmac fix: use readl & writel instead of __raw_readl & __raw_writel
On ARMv7 cores, device memory mapped as Normal Non-cacheable, may not guarantee
ordered access causing failures in device drivers that do not use the mandatory
memory barriers. readl & writel versions contain necessary memory barriers for
this.
commit 79f64dbf68c8a9779a7e9a25e0a9f0217a25b57a: "ARM: 6273/1: Add barriers to
the I/O accessors if ARM_DMA_MEM_BUFFERABLE" can be referred for more
information on this.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/pch_dma.c')
0 files changed, 0 insertions, 0 deletions