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| author | Sanjay R Mehta <sanju.mehta@amd.com> | 2021-08-28 21:28:28 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2021-08-29 15:44:21 +0200 |
| commit | e037e36c35c2587879ba6db90e626ffd9d3e2618 (patch) | |
| tree | 51333c57e522c8ddd62eabfcc8e2349de1921d14 /drivers/dma/ptdma | |
| parent | dmaengine: ptdma: Add debugfs entries for PTDMA (diff) | |
| download | linux-e037e36c35c2587879ba6db90e626ffd9d3e2618.tar.xz linux-e037e36c35c2587879ba6db90e626ffd9d3e2618.zip | |
dmaengine: ptdma: remove PT_OFFSET to avoid redefnition
Building on ARCH=um causes a "redefined" warning, so remove this
PT_OFFSET macro to avoid the warning.
drivers/dma/ptdma/ptdma.h:34: warning: "PT_OFFSET" redefined
34 | #define PT_OFFSET 0x0
|
In file included from ./arch/um/include/asm/thread_info.h:17,
from ./include/linux/thread_info.h:60,
from ./include/asm-generic/preempt.h:5,
from ./arch/um/include/generated/asm/preempt.h:1,
from ./include/linux/preempt.h:78,
from ./include/linux/spinlock.h:55,
from ./include/linux/wait.h:9,
from ./include/linux/wait_bit.h:8,
from ./include/linux/fs.h:6,
from ./include/linux/debugfs.h:15,
from drivers/dma/ptdma/ptdma-debugfs.c:12:
./arch/x86/um/shared/sysdep/ptrace_user.h:4: note: this is the location of the previous definition
4 | #define PT_OFFSET(r) ((r) * sizeof(long))
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 2a99524459ce ("dmaengine: ptdma: Initial driver for the AMD PTDMA")
Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com>
Link: https://lore.kernel.org/r/1630178908-54973-1-git-send-email-Sanju.Mehta@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/ptdma')
| -rw-r--r-- | drivers/dma/ptdma/ptdma.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/dma/ptdma/ptdma.h b/drivers/dma/ptdma/ptdma.h index 860e302bcae6..afbf192c9230 100644 --- a/drivers/dma/ptdma/ptdma.h +++ b/drivers/dma/ptdma/ptdma.h @@ -31,7 +31,6 @@ #define MAX_CMD_QLEN 100 #define PT_ENGINE_PASSTHRU 5 -#define PT_OFFSET 0x0 /* Register Mappings */ #define IRQ_MASK_REG 0x040 |