summaryrefslogtreecommitdiffstats
path: root/drivers/dma/qcom/hidma.h
diff options
context:
space:
mode:
authorSinan Kaya <okaya@codeaurora.org>2016-10-21 18:37:56 +0200
committerVinod Koul <vinod.koul@intel.com>2016-11-03 14:25:44 +0100
commitbdcfddfd7481d7756edfeb30fc28b550f6c64812 (patch)
tree25799f85346a01ee8b106a7ae39008db67af6f63 /drivers/dma/qcom/hidma.h
parentdmaengine: qcom_hidma: break completion processing on error (diff)
downloadlinux-bdcfddfd7481d7756edfeb30fc28b550f6c64812.tar.xz
linux-bdcfddfd7481d7756edfeb30fc28b550f6c64812.zip
dmaengine: qcom_hidma: make pending_tre_count atomic
Getting ready for the MSI interrupts. The pending_tre_count is used in the interrupt handler to make sure all outstanding requests are serviced. The driver will allocate 11 MSI interrupts. Each MSI interrupt can be assigned to a different CPU. Then, we have a race condition for common variables as they share the same interrupt handler with a different cause bit and they can potentially be executed in parallel. Making this variable atomic so that it can be updated from multiple processor contexts. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/qcom/hidma.h')
-rw-r--r--drivers/dma/qcom/hidma.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/dma/qcom/hidma.h b/drivers/dma/qcom/hidma.h
index de6176497524..181f7e0d08f6 100644
--- a/drivers/dma/qcom/hidma.h
+++ b/drivers/dma/qcom/hidma.h
@@ -59,7 +59,7 @@ struct hidma_lldev {
void __iomem *evca; /* Event Channel address */
struct hidma_tre
**pending_tre_list; /* Pointers to pending TREs */
- s32 pending_tre_count; /* Number of TREs pending */
+ atomic_t pending_tre_count; /* Number of TREs pending */
void *tre_ring; /* TRE ring */
dma_addr_t tre_dma; /* TRE ring to be shared with HW */