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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-17 18:55:43 +0200 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-17 18:55:43 +0200 |
| commit | 47ebe00b684c2bc183a766bc33c8b5943bc0df85 (patch) | |
| tree | c0f155acc5623f6990d20b7a623f48f5e7aa0f61 /drivers/dma/qcom/hidma.h | |
| parent | Merge tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux (diff) | |
| parent | dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support" (diff) | |
| download | linux-47ebe00b684c2bc183a766bc33c8b5943bc0df85.tar.xz linux-47ebe00b684c2bc183a766bc33c8b5943bc0df85.zip | |
Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul:
- Add support in dmaengine core to do device node checks for DT devices
and update bunch of drivers to use that and remove open coding from
drivers
- New driver/driver support for new hardware, namely:
- MediaTek UART APDMA
- Freescale i.mx7ulp edma2
- Synopsys eDMA IP core version 0
- Allwinner H6 DMA
- Updates to axi-dma and support for interleaved cyclic transfers
- Greg's debugfs return value check removals on drivers
- Updates to stm32-dma, hsu, dw, pl330, tegra drivers
* tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback
Documentation: dmaengine: clean up description of dmatest usage
dmaengine: tegra210-adma: remove PM_CLK dependency
dmaengine: fsl-edma: add i.mx7ulp edma2 version support
dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma
dmaengine: fsl-edma-common: version check for v2 instead
dmaengine: fsl-edma-common: move dmamux register to another single function
dmaengine: fsl-edma: add drvdata for fsl-edma
dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver"
dmaengine: rcar-dmac: Reject zero-length slave DMA requests
dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
dmaengine: dw-edma: fix semicolon.cocci warnings
dmaengine: sh: usb-dmac: Use [] to denote a flexible array member
dmaengine: dmatest: timeout value of -1 should specify infinite wait
dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit
dmaengine: fsl-edma: support little endian for edma driver
dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
dmagengine: pl330: add code to get reset property
dt-bindings: pl330: document the optional resets property
...
Diffstat (limited to 'drivers/dma/qcom/hidma.h')
| -rw-r--r-- | drivers/dma/qcom/hidma.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/dma/qcom/hidma.h b/drivers/dma/qcom/hidma.h index f337e2789ddc..f212466744f3 100644 --- a/drivers/dma/qcom/hidma.h +++ b/drivers/dma/qcom/hidma.h @@ -93,8 +93,6 @@ struct hidma_chan { * It is used by the DMA complete notification to * locate the descriptor that initiated the transfer. */ - struct dentry *debugfs; - struct dentry *stats; struct hidma_dev *dmadev; struct hidma_desc *running; @@ -126,7 +124,6 @@ struct hidma_dev { struct dma_device ddev; struct dentry *debugfs; - struct dentry *stats; /* sysfs entry for the channel id */ struct device_attribute *chid_attrs; @@ -158,6 +155,6 @@ irqreturn_t hidma_ll_inthandler(int irq, void *arg); irqreturn_t hidma_ll_inthandler_msi(int irq, void *arg, int cause); void hidma_cleanup_pending_tre(struct hidma_lldev *llhndl, u8 err_info, u8 err_code); -int hidma_debug_init(struct hidma_dev *dmadev); +void hidma_debug_init(struct hidma_dev *dmadev); void hidma_debug_uninit(struct hidma_dev *dmadev); #endif |