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authorSinan Kaya <okaya@codeaurora.org>2016-10-07 07:25:14 +0200
committerVinod Koul <vinod.koul@intel.com>2016-10-19 15:33:06 +0200
commitfc737969f645c1cbb1d167604eb7082fe18809c4 (patch)
tree4955b608d42fc7019ee3168c605d9db8030fd958 /drivers/dma/qcom
parentdmaengine: qcom_hidma: add a common API to setup the interrupt (diff)
downloadlinux-fc737969f645c1cbb1d167604eb7082fe18809c4.tar.xz
linux-fc737969f645c1cbb1d167604eb7082fe18809c4.zip
dmaengine: qcom_hidma: break completion processing on error
We try to consume as much successful transfers as possible. Now that we support MSI interrupts, an error interrupt might be observed by another processor while we are finishing the successful ones. Try to abort successful processing if this is the case. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/qcom')
-rw-r--r--drivers/dma/qcom/hidma_ll.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/dma/qcom/hidma_ll.c b/drivers/dma/qcom/hidma_ll.c
index 132d29eb9a63..e605c9096545 100644
--- a/drivers/dma/qcom/hidma_ll.c
+++ b/drivers/dma/qcom/hidma_ll.c
@@ -291,6 +291,13 @@ static int hidma_handle_tre_completion(struct hidma_lldev *lldev)
evre_write_off =
readl_relaxed(lldev->evca + HIDMA_EVCA_WRITE_PTR_REG);
num_completed++;
+
+ /*
+ * An error interrupt might have arrived while we are processing
+ * the completed interrupt.
+ */
+ if (!hidma_ll_isenabled(lldev))
+ break;
}
if (num_completed) {