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authorSinan Kaya <okaya@codeaurora.org>2017-03-26 00:04:02 +0100
committerVinod Koul <vinod.koul@intel.com>2017-03-27 07:13:38 +0200
commitc3a4528788cf09d709217f21be4b0fc38ada17d0 (patch)
tree0ba61ccd3d43873fd5cf266d8915cfc2a0673fe4 /drivers/dma/qcom
parentLinux 4.11-rc1 (diff)
downloadlinux-c3a4528788cf09d709217f21be4b0fc38ada17d0.tar.xz
linux-c3a4528788cf09d709217f21be4b0fc38ada17d0.zip
dmaengine: qcom_hidma: disable/enable IRQs on pause/resume
Once the channels are stopped, disable interrupts to make sure no new HW interaction can happen. Similarly, re-enable the interrupts only if we know that channel is operational again. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/qcom')
-rw-r--r--drivers/dma/qcom/hidma_ll.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/dma/qcom/hidma_ll.c b/drivers/dma/qcom/hidma_ll.c
index 6645bdf0d151..1530a661518d 100644
--- a/drivers/dma/qcom/hidma_ll.c
+++ b/drivers/dma/qcom/hidma_ll.c
@@ -499,6 +499,9 @@ int hidma_ll_enable(struct hidma_lldev *lldev)
lldev->trch_state = HIDMA_CH_ENABLED;
lldev->evch_state = HIDMA_CH_ENABLED;
+ /* enable irqs */
+ writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
+
return 0;
}
@@ -596,6 +599,9 @@ int hidma_ll_disable(struct hidma_lldev *lldev)
lldev->trch_state = HIDMA_CH_SUSPENDED;
lldev->evch_state = HIDMA_CH_SUSPENDED;
+
+ /* disable interrupts */
+ writel(0, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
return 0;
}