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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2020-12-08 10:04:21 +0100
committerVinod Koul <vkoul@kernel.org>2020-12-11 16:50:07 +0100
commite2de925bbfe321ba0588c99f577c59386ab1f428 (patch)
tree56f831b91378b9f68096da42b9ab4e759793149c /drivers/dma/ti
parentMerge tag 'tags/drivers_soc_for_5.11' into dmaengine/next (diff)
downloadlinux-e2de925bbfe321ba0588c99f577c59386ab1f428.tar.xz
linux-e2de925bbfe321ba0588c99f577c59386ab1f428.zip
dmaengine: ti: k3-udma: Correct normal channel offset when uchan_cnt is not 0
According to different sections of the TRM, the hchan_cnt of CAP3 includes the number of uchan in UDMA, thus the start offset of the normal channels are hchan_cnt. Fixes: daf4ad0499aa4 ("dmaengine: ti: k3-udma: Query throughput level information from hardware") Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20201208090440.31792-2-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/ti')
-rw-r--r--drivers/dma/ti/k3-udma.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index e508280b3d70..0e8426dd18a7 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -3199,8 +3199,7 @@ static int udma_setup_resources(struct udma_dev *ud)
} else if (UDMA_CAP3_UCHAN_CNT(cap3)) {
ud->tpl_levels = 3;
ud->tpl_start_idx[1] = UDMA_CAP3_UCHAN_CNT(cap3);
- ud->tpl_start_idx[0] = ud->tpl_start_idx[1] +
- UDMA_CAP3_HCHAN_CNT(cap3);
+ ud->tpl_start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
} else if (UDMA_CAP3_HCHAN_CNT(cap3)) {
ud->tpl_levels = 2;
ud->tpl_start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);