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author | Viresh Kumar <viresh.kumar@st.com> | 2011-03-03 11:17:21 +0100 |
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committer | Vinod Koul <vinod.koul@intel.com> | 2011-03-06 20:42:28 +0100 |
commit | b0c3130d69bda5cd91aa3b3f08e7878df49fde69 (patch) | |
tree | a75091d3489cc2db2a806cd30d0ef6f80419e86d /drivers/dma | |
parent | dw_dmac: Mark all tx_descriptors with DMA_CRTL_ACK after xfer finish (diff) | |
download | linux-b0c3130d69bda5cd91aa3b3f08e7878df49fde69.tar.xz linux-b0c3130d69bda5cd91aa3b3f08e7878df49fde69.zip |
dw_dmac: Pass Channel Allocation Order from platform_data
In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better
channel first. This patch introduces concept of channel allocation order in
dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel
allocation will follow, else channels will be allocated in descending order.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r-- | drivers/dma/dw_dmac.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c index 6ab440e532bf..f413e123405a 100644 --- a/drivers/dma/dw_dmac.c +++ b/drivers/dma/dw_dmac.c @@ -1319,7 +1319,11 @@ static int __init dw_probe(struct platform_device *pdev) dwc->chan.device = &dw->dma; dwc->chan.cookie = dwc->completed = 1; dwc->chan.chan_id = i; - list_add_tail(&dwc->chan.device_node, &dw->dma.channels); + if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING) + list_add_tail(&dwc->chan.device_node, + &dw->dma.channels); + else + list_add(&dwc->chan.device_node, &dw->dma.channels); dwc->ch_regs = &__dw_regs(dw)->CHAN[i]; spin_lock_init(&dwc->lock); |