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authorMaxime Ripard <maxime.ripard@free-electrons.com>2015-09-15 15:36:00 +0200
committerVinod Koul <vinod.koul@intel.com>2015-10-01 03:59:40 +0200
commita1cf09031e641d3cceaca4a4dd20ef6a785bc9b3 (patch)
treee62a9e42a2db4de85ce78ea624cbaeb6f9e3d3a3 /drivers/dma
parentdmaengine: dw: properly read DWC_PARAMS register (diff)
downloadlinux-a1cf09031e641d3cceaca4a4dd20ef6a785bc9b3.tar.xz
linux-a1cf09031e641d3cceaca4a4dd20ef6a785bc9b3.zip
dmaengine: at_xdmac: change block increment addressing mode
The addressing mode we were using was not only incrementing the address at each microblock, but also at each data boundary, which was severely slowing the transfer, without any benefit since we were not using the data stride. Switch to the micro block increment only in order to get back to an acceptable performance level. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Fixes: 6007ccb57744 ("dmaengine: xdmac: Add interleaved transfer support") Cc: stable@vger.kernel.org #4.2 Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/at_xdmac.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index a165b4bfd330..ffea6027b631 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -875,14 +875,14 @@ at_xdmac_interleaved_queue_desc(struct dma_chan *chan,
if (xt->src_inc) {
if (xt->src_sgl)
- chan_cc |= AT_XDMAC_CC_SAM_UBS_DS_AM;
+ chan_cc |= AT_XDMAC_CC_SAM_UBS_AM;
else
chan_cc |= AT_XDMAC_CC_SAM_INCREMENTED_AM;
}
if (xt->dst_inc) {
if (xt->dst_sgl)
- chan_cc |= AT_XDMAC_CC_DAM_UBS_DS_AM;
+ chan_cc |= AT_XDMAC_CC_DAM_UBS_AM;
else
chan_cc |= AT_XDMAC_CC_DAM_INCREMENTED_AM;
}