diff options
| author | Thor Thayer <tthayer@opensource.altera.com> | 2016-02-10 20:26:21 +0100 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2016-02-11 12:23:06 +0100 |
| commit | c3eea1942a16db52ebea0382bd5826f75b9b7e9b (patch) | |
| tree | 3dae0d37c04b9a015d76eca8d0491c147370b511 /drivers/edac/Makefile | |
| parent | EDAC: Use edac_debugfs_remove_recursive() in edac_debugfs_exit() (diff) | |
| download | linux-c3eea1942a16db52ebea0382bd5826f75b9b7e9b.tar.xz linux-c3eea1942a16db52ebea0382bd5826f75b9b7e9b.zip | |
EDAC, altera: Add Altera L2 cache and OCRAM support
Add L2 Cache and On-Chip RAM EDAC support for the Altera SoCs. The SDRAM
controller is using the Memory Controller model.
Each type of ECC is individually configurable.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-doc@vger.kernel.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mark.rutland@arm.com
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Link: http://lkml.kernel.org/r/1455132384-17108-1-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac/Makefile')
| -rw-r--r-- | drivers/edac/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile index be163e20fe56..f9e4a3e0e6e9 100644 --- a/drivers/edac/Makefile +++ b/drivers/edac/Makefile @@ -67,6 +67,6 @@ obj-$(CONFIG_EDAC_OCTEON_L2C) += octeon_edac-l2c.o obj-$(CONFIG_EDAC_OCTEON_LMC) += octeon_edac-lmc.o obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o -obj-$(CONFIG_EDAC_ALTERA_MC) += altera_edac.o +obj-$(CONFIG_EDAC_ALTERA) += altera_edac.o obj-$(CONFIG_EDAC_SYNOPSYS) += synopsys_edac.o obj-$(CONFIG_EDAC_XGENE) += xgene_edac.o |