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author | Thor Thayer <tthayer@opensource.altera.com> | 2016-06-22 15:58:53 +0200 |
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committer | Borislav Petkov <bp@suse.de> | 2016-06-24 11:58:43 +0200 |
commit | 2b083d65ff11e02b967d9f6e68aea7722eba9ea4 (patch) | |
tree | 1e3259cd887fbf4860fca38b6e515575b4796d67 /drivers/edac/altera_edac.c | |
parent | EDAC, altera: Check parent status for Arria10 EDAC block (diff) | |
download | linux-2b083d65ff11e02b967d9f6e68aea7722eba9ea4.tar.xz linux-2b083d65ff11e02b967d9f6e68aea7722eba9ea4.zip |
EDAC, altera: Add panic flag check to A10 IRQ
In preparation for additional memory module ECCs, the IRQ function will
check a panic flag before doing a kernel panic on double bit errors.
OCRAM uncorrectable errors cause a panic because sleep/resume functions
and FPGA contents during sleep are stored in OCRAM.
ECCs on peripheral FIFO buffers will not cause a kernel panic on DBERRs
because the packet can be retried and therefore recovered.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1466603939-7526-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac/altera_edac.c')
-rw-r--r-- | drivers/edac/altera_edac.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index 453e92c786c8..dcedc4a8cd12 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -897,7 +897,8 @@ static irqreturn_t altr_edac_a10_ecc_irq(int irq, void *dev_id) writel(ALTR_A10_ECC_DERRPENA, base + ALTR_A10_ECC_INTSTAT_OFST); edac_device_handle_ue(dci->edac_dev, 0, 0, dci->edac_dev_name); - panic("\nEDAC:ECC_DEVICE[Uncorrectable errors]\n"); + if (dci->data->panic) + panic("\nEDAC:ECC_DEVICE[Uncorrectable errors]\n"); return IRQ_HANDLED; } @@ -936,6 +937,12 @@ static const struct edac_device_prv_data a10_ocramecc_data = { .set_err_ofst = ALTR_A10_ECC_INTTEST_OFST, .ecc_irq_handler = altr_edac_a10_ecc_irq, .inject_fops = &altr_edac_a10_device_inject_fops, + /* + * OCRAM panic on uncorrectable error because sleep/resume + * functions and FPGA contents are stored in OCRAM. Prefer + * a kernel panic over executing/loading corrupted data. + */ + .panic = true, }; #endif /* CONFIG_EDAC_ALTERA_OCRAM */ |