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authorMauro Carvalho Chehab <mchehab@redhat.com>2013-03-11 13:28:48 +0100
committerBorislav Petkov <bp@suse.de>2013-03-16 06:32:30 +0100
commit9713faecff3d071de1208b081d4943b002e9cb1c (patch)
treeb6ab68f15527eae952a407aa604607aca719a5ba /drivers/edac/amd64_edac.c
parentamd64_edac: Correct DIMM sizes (diff)
downloadlinux-9713faecff3d071de1208b081d4943b002e9cb1c.tar.xz
linux-9713faecff3d071de1208b081d4943b002e9cb1c.zip
EDAC: Merge mci.mem_is_per_rank with mci.csbased
Both mci.mem_is_per_rank and mci.csbased denote the same thing: the memory controller is csrows based. Merge both fields into one. There's no need for the driver to actually fill it, as the core detects it by checking if one of the layers has the csrows type as part of the memory hierarchy: if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT) per_rank = true; Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac/amd64_edac.c')
-rw-r--r--drivers/edac/amd64_edac.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 532de775a184..e1d13c463c90 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2423,7 +2423,6 @@ static int amd64_init_one_instance(struct pci_dev *F2)
mci->pvt_info = pvt;
mci->pdev = &pvt->F2->dev;
- mci->csbased = 1;
setup_mci_misc_attrs(mci, fam_type);