summaryrefslogtreecommitdiffstats
path: root/drivers/edac/edac_mc.c
diff options
context:
space:
mode:
authorMarcin Tomczak <marcin.tomczak@intel.com>2011-07-30 02:16:50 +0200
committerJames Bottomley <JBottomley@Parallels.com>2011-08-24 04:52:14 +0200
commit985af6f70dbb8a33b3af8a7c7df508d924650e37 (patch)
tree7607fbd7e2162b5e0e16ab57720cea682fa0b9d1 /drivers/edac/edac_mc.c
parent[SCSI] isci: fix 32-bit operation when CONFIG_HIGHMEM64G=n (diff)
downloadlinux-985af6f70dbb8a33b3af8a7c7df508d924650e37.tar.xz
linux-985af6f70dbb8a33b3af8a7c7df508d924650e37.zip
[SCSI] isci: change sas phy timeouts from 54us to 59us
Need the following workaround in the driver for interoperability with the older Intel SSD drives and any other SATA drive that may exhibit the same behavior. This is a corner case where SCU speed is limited to either 3G or 1.5G and the drive has a period of DC idle when it switches speed during SATA speed negotiation. Workaround :change PHYTOV[31:24] from 0x36 to 0x3B. Signed-off-by: Marcin Tomczak <marcin.tomczak@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/edac/edac_mc.c')
0 files changed, 0 insertions, 0 deletions