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| author | Robert Richter <rrichter@marvell.com> | 2020-02-14 15:17:56 +0100 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2020-02-17 13:07:50 +0100 |
| commit | 6334dc4e3ff53031a2d522b826c4fab92cfdea93 (patch) | |
| tree | 640f3ffa04562aa12c27bd266d562fcf5d9bde4e /drivers/edac | |
| parent | EDAC/mc: Determine mci pointer from the error descriptor (diff) | |
| download | linux-6334dc4e3ff53031a2d522b826c4fab92cfdea93.tar.xz linux-6334dc4e3ff53031a2d522b826c4fab92cfdea93.zip | |
EDAC/mc: Carve out error increment into a separate function
Carve out the error_count increment into a separate function
edac_inc_csrow(). This better separates code and reduces the indentation
level.
Implementation note: The function edac_inc_csrow() counts the same
as before, ->ce_count is only incremented if row >= 0. This is esp.
true for the case of (!e->enable_per_layer_report). Here, a DIMM was
not found, variable row still has a value of -1 and ->ce_count is not
incremented.
[ bp: Massage commit message. ]
Signed-off-by: Robert Richter <rrichter@marvell.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Acked-by: Aristeu Rozanski <aris@redhat.com>
Link: https://lkml.kernel.org/r/20200214141757.8976-1-rrichter@marvell.com
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/edac_mc.c | 40 |
1 files changed, 25 insertions, 15 deletions
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index bc8d1d7b21a0..35d282492505 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -1089,6 +1089,26 @@ static void edac_ue_error(struct mem_ctl_info *mci, edac_inc_ue_error(mci, enable_per_layer_report, pos, error_count); } +static void edac_inc_csrow(struct edac_raw_error_desc *e, int row, int chan) +{ + struct mem_ctl_info *mci = error_desc_to_mci(e); + enum hw_event_mc_err_type type = e->type; + u16 count = e->error_count; + + if (row < 0) + return; + + edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan); + + if (type == HW_EVENT_ERR_CORRECTED) { + mci->csrows[row]->ce_count += count; + if (chan >= 0) + mci->csrows[row]->channels[chan]->ce_count += count; + } else { + mci->csrows[row]->ue_count += count; + } +} + void edac_raw_mc_handle_error(struct edac_raw_error_desc *e) { struct mem_ctl_info *mci = error_desc_to_mci(e); @@ -1256,22 +1276,12 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type, chan = -2; } - if (!e->enable_per_layer_report) { + if (!e->enable_per_layer_report) strcpy(e->label, "any memory"); - } else { - edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan); - if (p == e->label) - strcpy(e->label, "unknown memory"); - if (type == HW_EVENT_ERR_CORRECTED) { - if (row >= 0) { - mci->csrows[row]->ce_count += error_count; - if (chan >= 0) - mci->csrows[row]->channels[chan]->ce_count += error_count; - } - } else - if (row >= 0) - mci->csrows[row]->ue_count += error_count; - } + else if (!*e->label) + strcpy(e->label, "unknown memory"); + + edac_inc_csrow(e, row, chan); /* Fill the RAM location data */ p = e->location; |