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authorQiuxu Zhuo <qiuxu.zhuo@intel.com>2020-11-17 13:49:52 +0100
committerTony Luck <tony.luck@intel.com>2020-11-19 21:57:09 +0100
commitbc1c99a5971aa7571e8b9731c28fa32abe12cab8 (patch)
tree6259dcec1c31095603a689f527730d461e58f9b9 /drivers/edac
parentEDAC/i10nm: Use readl() to access MMIO registers (diff)
downloadlinux-bc1c99a5971aa7571e8b9731c28fa32abe12cab8.tar.xz
linux-bc1c99a5971aa7571e8b9731c28fa32abe12cab8.zip
EDAC: Add DDR5 new memory type
Add a new entry to 'enum mem_type' and a new string to 'edac_mem_types[]' for DDR5 new memory type. Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/edac_mc.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index eef8724faae0..f6d462d0be2d 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -163,6 +163,7 @@ const char * const edac_mem_types[] = {
[MEM_RDDR4] = "Registered-DDR4",
[MEM_LPDDR4] = "Low-Power-DDR4-RAM",
[MEM_LRDDR4] = "Load-Reduced-DDR4-RAM",
+ [MEM_DDR5] = "Unbuffered-DDR5",
[MEM_NVDIMM] = "Non-volatile-RAM",
[MEM_WIO2] = "Wide-IO-2",
};