diff options
author | Christoph Hellwig <hch@lst.de> | 2019-11-07 10:20:39 +0100 |
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committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-12-20 12:40:24 +0100 |
commit | 9209fb51896fe0eef8dfac85afe1f357e9265c0d (patch) | |
tree | d169219e01f1c6d347937657ff7404a141531cca /drivers/edac | |
parent | riscv: define vmemmap before pfn_to_page calls (diff) | |
download | linux-9209fb51896fe0eef8dfac85afe1f357e9265c0d.tar.xz linux-9209fb51896fe0eef8dfac85afe1f357e9265c0d.zip |
riscv: move sifive_l2_cache.c to drivers/soc
The sifive_l2_cache.c is in no way related to RISC-V architecture
memory management. It is a little stub driver working around the fact
that the EDAC maintainers prefer their drivers to be structured in a
certain way that doesn't fit the SiFive SOCs.
Move the file to drivers/soc and add a Kconfig option for it, as well
as the whole drivers/soc boilerplate for CONFIG_SOC_SIFIVE.
Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
[paul.walmsley@sifive.com: keep the MAINTAINERS change specific to the L2$ controller code]
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 417dad635526..5c8272329a65 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -462,7 +462,7 @@ config EDAC_ALTERA_SDMMC config EDAC_SIFIVE bool "Sifive platform EDAC driver" - depends on EDAC=y && RISCV + depends on EDAC=y && SIFIVE_L2 help Support for error detection and correction on the SiFive SoCs. |