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authorElaine Zhang <zhangqing@rock-chips.com>2017-08-08 09:19:33 +0200
committerHeiko Stuebner <heiko@sntech.de>2017-08-08 17:28:57 +0200
commitb75f38451a5d7b6893087ca6c0ec7b01491f60b0 (patch)
tree08de4ad2d6287c03c2f1b80cbdd3ff9db2217b42 /drivers/extcon
parentclk: rockchip: rename some of clks for rv1108 SoC (diff)
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clk: rockchip: add some critical clocks for rv1108 SoC
the bus/periph/nclk_ddrupctl/pclk_ddrmon/pclk_acodecphy/pclk_pmu no driver to handle them, Chip design requirements for these clock to always on. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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