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authorHuacai Chen <chenhuacai@loongson.cn>2024-07-20 16:40:59 +0200
committerHuacai Chen <chenhuacai@loongson.cn>2024-07-20 16:40:59 +0200
commit8e02c3b782ec64343f3cccc8dc5a8be2b379e80b (patch)
treeb3dea31c724b20becad2cd2a892b304234573457 /drivers/firmware/efi/libstub
parentLoongArch: Add ARCH_HAS_DEBUG_VM_PGTABLE support (diff)
downloadlinux-8e02c3b782ec64343f3cccc8dc5a8be2b379e80b.tar.xz
linux-8e02c3b782ec64343f3cccc8dc5a8be2b379e80b.zip
LoongArch: Add writecombine support for DMW-based ioremap()
Currently, only TLB-based ioremap() support writecombine, so add the counterpart for DMW-based ioremap() with help of DMW2. The base address (WRITECOMBINE_BASE) is configured as 0xa000000000000000. DMW3 is unused by kernel now, however firmware may leave garbage in them and interfere kernel's address mapping. So clear it as necessary. BTW, centralize the DMW configuration to macro SETUP_DMWINS. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'drivers/firmware/efi/libstub')
-rw-r--r--drivers/firmware/efi/libstub/loongarch.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/firmware/efi/libstub/loongarch.c b/drivers/firmware/efi/libstub/loongarch.c
index d0ef93551c44..3782d0a187d1 100644
--- a/drivers/firmware/efi/libstub/loongarch.c
+++ b/drivers/firmware/efi/libstub/loongarch.c
@@ -74,6 +74,8 @@ efi_status_t efi_boot_kernel(void *handle, efi_loaded_image_t *image,
/* Config Direct Mapping */
csr_write64(CSR_DMW0_INIT, LOONGARCH_CSR_DMWIN0);
csr_write64(CSR_DMW1_INIT, LOONGARCH_CSR_DMWIN1);
+ csr_write64(CSR_DMW2_INIT, LOONGARCH_CSR_DMWIN2);
+ csr_write64(CSR_DMW3_INIT, LOONGARCH_CSR_DMWIN3);
real_kernel_entry = (void *)kernel_entry_address(kernel_addr, image);