diff options
author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2016-06-17 19:40:43 +0200 |
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committer | Andy Gross <andy.gross@linaro.org> | 2016-06-25 05:53:52 +0200 |
commit | dd4fe5b292226f2459305965c960d8dc39f36e0f (patch) | |
tree | 5a9ec8e6bbaa32cb2c518aad547892a48a0af58d /drivers/firmware/qcom_scm.c | |
parent | firmware: qcom: scm: Peripheral Authentication Service (diff) | |
download | linux-dd4fe5b292226f2459305965c960d8dc39f36e0f.tar.xz linux-dd4fe5b292226f2459305965c960d8dc39f36e0f.zip |
firmware: qcom: scm: Expose PAS command 10 as reset-controller
PAS command 10 is used to assert and deassert the MSS reset via
TrustZone, expose this as a reset-controller to mimic the direct
access case.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'drivers/firmware/qcom_scm.c')
-rw-r--r-- | drivers/firmware/qcom_scm.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index ec46c68e3e83..84330c5f05d0 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -21,6 +21,7 @@ #include <linux/of.h> #include <linux/of_platform.h> #include <linux/clk.h> +#include <linux/reset-controller.h> #include "qcom_scm.h" @@ -29,6 +30,7 @@ struct qcom_scm { struct clk *core_clk; struct clk *iface_clk; struct clk *bus_clk; + struct reset_controller_dev reset; }; static struct qcom_scm *__scm; @@ -283,6 +285,30 @@ int qcom_scm_pas_shutdown(u32 peripheral) } EXPORT_SYMBOL(qcom_scm_pas_shutdown); +static int qcom_scm_pas_reset_assert(struct reset_controller_dev *rcdev, + unsigned long idx) +{ + if (idx != 0) + return -EINVAL; + + return __qcom_scm_pas_mss_reset(__scm->dev, 1); +} + +static int qcom_scm_pas_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long idx) +{ + if (idx != 0) + return -EINVAL; + + return __qcom_scm_pas_mss_reset(__scm->dev, 0); +} + +static const struct reset_control_ops qcom_scm_pas_reset_ops = { + .assert = qcom_scm_pas_reset_assert, + .deassert = qcom_scm_pas_reset_deassert, +}; + + static int qcom_scm_probe(struct platform_device *pdev) { struct qcom_scm *scm; @@ -316,6 +342,11 @@ static int qcom_scm_probe(struct platform_device *pdev) } } + scm->reset.ops = &qcom_scm_pas_reset_ops; + scm->reset.nr_resets = 1; + scm->reset.of_node = pdev->dev.of_node; + reset_controller_register(&scm->reset); + /* vote for max clk rate for highest performance */ ret = clk_set_rate(scm->core_clk, INT_MAX); if (ret) |