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authorBjorn Andersson <bjorn.andersson@linaro.org>2017-08-15 00:46:17 +0200
committerAndy Gross <andy.gross@linaro.org>2017-10-12 06:48:27 +0200
commit4e659dbe2d02a56ca0df25c77e099760252a329c (patch)
treed41bd3ca1e79a6c1b19a637ea9f34030ae7deb91 /drivers/firmware/qcom_scm.h
parentsoc: qcom: smem: Increase the number of hosts (diff)
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firmware: qcom: scm: Expose secure IO service
The secure IO service provides operations for reading and writing secure memory from non-secure mode, expose this API through SCM. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'drivers/firmware/qcom_scm.h')
-rw-r--r--drivers/firmware/qcom_scm.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index 9bea691f30fb..a60e4b9b1394 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -30,6 +30,12 @@ extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
#define QCOM_SCM_CMD_CORE_HOTPLUGGED 0x10
extern void __qcom_scm_cpu_power_down(u32 flags);
+#define QCOM_SCM_SVC_IO 0x5
+#define QCOM_SCM_IO_READ 0x1
+#define QCOM_SCM_IO_WRITE 0x2
+extern int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr, unsigned int *val);
+extern int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val);
+
#define QCOM_SCM_SVC_INFO 0x6
#define QCOM_IS_CALL_AVAIL_CMD 0x1
extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,