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author | Arnd Bergmann <arnd@arndb.de> | 2020-03-25 13:36:09 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2020-03-25 13:36:09 +0100 |
commit | 90ae9ee792537e5a0018555d35b274b0a0b5e51d (patch) | |
tree | 1d85158ddcbbb70f947f917fe2423f9ef2c860d1 /drivers/firmware | |
parent | Merge tag 'qcom-drivers-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel... (diff) | |
parent | soc: imx: drop COMPILE_TEST for IMX_SCU_SOC (diff) | |
download | linux-90ae9ee792537e5a0018555d35b274b0a0b5e51d.tar.xz linux-90ae9ee792537e5a0018555d35b274b0a0b5e51d.zip |
Merge tag 'imx-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.7:
- Update SCU power domain driver to include PD ranges for audio, CM40
I2C and INTMUX, also enlarge PD range for mu_b.
- Remove IMX_SC_RPC_SVC_ABORT from SCU API, as it was added by mistake.
- Increase build test coverage for i.MX8M SoC and IMX_SCU driver.
- Improve i.MX GPC power up sequencing to ensure that the reset is
properly propagated through the peripheral devices in the power
domain.
* tag 'imx-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
firmware: imx: add COMPILE_TEST for IMX_SCU driver
soc: imx: gpc: fix power up sequencing
soc: imx: increase build coverage for imx8m soc driver
firmware: imx: scu-pd: add power domain for I2C and INTMUX in CM40 SS
firmware: imx: Remove IMX_SC_RPC_SVC_ABORT
firmware: imx: scu-pd: enlarge PD range for mu_b
firmware: imx: scu-pd: Add missing audio PD ranges
soc: imx: gpcv2: include linux/sizes.h
Link: https://lore.kernel.org/r/20200318051918.32579-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/firmware')
-rw-r--r-- | drivers/firmware/imx/Kconfig | 2 | ||||
-rw-r--r-- | drivers/firmware/imx/scu-pd.c | 13 |
2 files changed, 13 insertions, 2 deletions
diff --git a/drivers/firmware/imx/Kconfig b/drivers/firmware/imx/Kconfig index 1d2e5b85d7ca..58e8c6c115a0 100644 --- a/drivers/firmware/imx/Kconfig +++ b/drivers/firmware/imx/Kconfig @@ -12,7 +12,7 @@ config IMX_DSP config IMX_SCU bool "IMX SCU Protocol driver" - depends on IMX_MBOX + depends on IMX_MBOX || COMPILE_TEST help The System Controller Firmware (SCFW) is a low-level system function which runs on a dedicated Cortex-M core to provide power, clock, and diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index b556612207e5..f3b4246ff200 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -93,7 +93,7 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "kpp", IMX_SC_R_KPP, 1, false, 0 }, { "fspi", IMX_SC_R_FSPI_0, 2, true, 0 }, { "mu_a", IMX_SC_R_MU_0A, 14, true, 0 }, - { "mu_b", IMX_SC_R_MU_13B, 1, true, 13 }, + { "mu_b", IMX_SC_R_MU_5B, 9, true, 5 }, /* CONN SS */ { "usb", IMX_SC_R_USB_0, 2, true, 0 }, @@ -109,6 +109,7 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, false, 0 }, { "audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 }, { "audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 }, + { "audio-clk-1", IMX_SC_R_AUDIO_CLK_1, 1, false, 0 }, { "dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true, 0 }, { "dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 }, { "dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true, 0 }, @@ -116,7 +117,13 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "asrc1", IMX_SC_R_ASRC_1, 1, false, 0 }, { "esai0", IMX_SC_R_ESAI_0, 1, false, 0 }, { "spdif0", IMX_SC_R_SPDIF_0, 1, false, 0 }, + { "spdif1", IMX_SC_R_SPDIF_1, 1, false, 0 }, { "sai", IMX_SC_R_SAI_0, 3, true, 0 }, + { "sai3", IMX_SC_R_SAI_3, 1, false, 0 }, + { "sai4", IMX_SC_R_SAI_4, 1, false, 0 }, + { "sai5", IMX_SC_R_SAI_5, 1, false, 0 }, + { "sai6", IMX_SC_R_SAI_6, 1, false, 0 }, + { "sai7", IMX_SC_R_SAI_7, 1, false, 0 }, { "amix", IMX_SC_R_AMIX, 1, false, 0 }, { "mqs0", IMX_SC_R_MQS_0, 1, false, 0 }, { "dsp", IMX_SC_R_DSP, 1, false, 0 }, @@ -158,6 +165,10 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { /* DC SS */ { "dc0", IMX_SC_R_DC_0, 1, false, 0 }, { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 }, + + /* CM40 SS */ + { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, 0 }, + { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, 0 }, }; static const struct imx_sc_pd_soc imx8qxp_scu_pd = { |