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authorChris Zhong <zyw@rock-chips.com>2018-02-16 13:09:54 +0100
committerKishon Vijay Abraham I <kishon@ti.com>2018-03-16 12:25:34 +0100
commit5eac5e9c0f515f8e452321b159b4093065dfc757 (patch)
treef5b2efff29335a8337286c9950461aa36487c199 /drivers/fmc/Kconfig
parentphy: rockchip-typec: enable usb3 host during usb3 phy power on (diff)
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phy: rockchip-typec: force to USB2 if DP at 4 lanes mode
The usb3tousb2_en BIT will be clear to 0 in probe(), it make USB controller work at USB3 mode, and if the USB phy is turned on with DP only mode(4 lanes DP), the rockchip_usb3_phy_power_on() will return directly, so usb3_host_disable and usb3_host_port these 2 BIT will keep a same value as coreboot. In coreboot, these 3 BITs are set as USB2 mode, but now one of the bits is changed to USB3, it make USB controller work at a unknown status. These 3 BITs should be changed to USB2, if the Type-C works at 4 lanes mode, and then switch it back to USB3 mode, when USB disconnect. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/fmc/Kconfig')
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