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| author | Alan Tull <atull@opensource.altera.com> | 2016-11-01 20:14:30 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-11-10 17:03:36 +0100 |
| commit | e5f8efa5c8bf86c1fa698551d54db8f6aee221fd (patch) | |
| tree | 8be983f965df4d7f28d05285b8d8ee57041a8dee /drivers/fpga/Kconfig | |
| parent | fpga: fpga-region: device tree control for FPGA (diff) | |
| download | linux-e5f8efa5c8bf86c1fa698551d54db8f6aee221fd.tar.xz linux-e5f8efa5c8bf86c1fa698551d54db8f6aee221fd.zip | |
ARM: socfpga: fpga bridge driver support
Supports Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Allows enabling/disabling the bridges through the FPGA
Bridge Framework API functions.
The fpga2sdram driver only supports enabling and disabling
of the ports that been configured early on. This is due to
a hardware limitation where the read, write, and command
ports on the fpga2sdram bridge can only be reconfigured
while there are no transactions to the sdram, i.e. when
running out of OCRAM before the kernel boots.
Device tree property 'init-val' configures the driver to
enable or disable the bridge during probe. If the property
does not exist, the driver will leave the bridge in its
current state.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Matthew Gerlach <mgerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga/Kconfig')
| -rw-r--r-- | drivers/fpga/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index e0e1257e17e2..5605ad6a4e97 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -40,6 +40,13 @@ config FPGA_BRIDGE Say Y here if you want to support bridges connected between host processors and FPGAs or between FPGAs. +config SOCFPGA_FPGA_BRIDGE + tristate "Altera SoCFPGA FPGA Bridges" + depends on ARCH_SOCFPGA && FPGA_BRIDGE + help + Say Y to enable drivers for FPGA bridges for Altera SOCFPGA + devices. + endif # FPGA endmenu |