diff options
| author | Alan Tull <atull@kernel.org> | 2017-11-15 21:20:18 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-11-28 16:30:37 +0100 |
| commit | ed81f5fc3c35c22d0fc62813cfa4e11b6aea0a64 (patch) | |
| tree | f3109f452fb0ec191b1096a6640b80e77af07440 /drivers/fpga | |
| parent | fpga: region: check for child regions before allocing image info (diff) | |
| download | linux-ed81f5fc3c35c22d0fc62813cfa4e11b6aea0a64.tar.xz linux-ed81f5fc3c35c22d0fc62813cfa4e11b6aea0a64.zip | |
fpga: region: fix slow warning with more than one overlay
When DT overlays are applied, each FPGA region keeps track of the fpga
image info as region->info. This pointer is assigned only if an
overlay causes the FPGA to be programmed. As it stands, this pointer
can be overwritten, causing a slow warning later when overlays are
removed.
This patch fixes this by changing the allowed behaviour. If a region
has received an overlay that programmed the FPGA, reject other
overlays that try to program the FPGA. To reprogram the FPGA, first
remove the overlay. This makes sense as removing the overlay also
removes the devices cleanly. Note that overlays that make DT changes
without reprogramming the FPGA are exempt from this restriction.
Signed-off-by: Alan Tull <atull@kernel.org>
Acked-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga')
| -rw-r--r-- | drivers/fpga/fpga-region.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c index afac5433978b..35af952a889a 100644 --- a/drivers/fpga/fpga-region.c +++ b/drivers/fpga/fpga-region.c @@ -355,6 +355,11 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region, const char *firmware_name; int ret; + if (region->info) { + dev_err(dev, "Region already has overlay applied.\n"); + return -EINVAL; + } + /* * Reject overlay if child FPGA Regions added in the overlay have * firmware-name property (would mean that an FPGA region that has |