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authorMatthew Gerlach <matthew.gerlach@linux.intel.com>2017-04-24 23:34:22 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-04-26 11:38:56 +0200
commitdd17cc7bf8b9447f5612c3887b84a88eeb5e3dff (patch)
tree4a416a8043b686cf86b25e244d5b08824884cdf4 /drivers/fpga
parentfpga: region: release FPGA region reference in error path (diff)
downloadlinux-dd17cc7bf8b9447f5612c3887b84a88eeb5e3dff.tar.xz
linux-dd17cc7bf8b9447f5612c3887b84a88eeb5e3dff.zip
fpga fr br: update supported version numbers
The value in the version register of the altera freeze bridge controller changed from the beta value of 2 to the value of 0xad000003 in the official release of the IP. This patch supports the old and new version numbers, and the driver's probe function will fail if neither of the supported versions is found. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Reviewed-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga')
-rw-r--r--drivers/fpga/altera-freeze-bridge.c30
1 files changed, 19 insertions, 11 deletions
diff --git a/drivers/fpga/altera-freeze-bridge.c b/drivers/fpga/altera-freeze-bridge.c
index 8c1bc7e7ee69..6159cfcf78a2 100644
--- a/drivers/fpga/altera-freeze-bridge.c
+++ b/drivers/fpga/altera-freeze-bridge.c
@@ -28,6 +28,7 @@
#define FREEZE_CSR_REG_VERSION 12
#define FREEZE_CSR_SUPPORTED_VERSION 2
+#define FREEZE_CSR_OFFICIAL_VERSION 0xad000003
#define FREEZE_CSR_STATUS_FREEZE_REQ_DONE BIT(0)
#define FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE BIT(1)
@@ -218,6 +219,7 @@ static int altera_freeze_br_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = pdev->dev.of_node;
+ void __iomem *base_addr;
struct altera_freeze_br_data *priv;
struct resource *res;
u32 status, revision;
@@ -225,26 +227,32 @@ static int altera_freeze_br_probe(struct platform_device *pdev)
if (!np)
return -ENODEV;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base_addr = devm_ioremap_resource(dev, res);
+ if (IS_ERR(base_addr))
+ return PTR_ERR(base_addr);
+
+ revision = readl(base_addr + FREEZE_CSR_REG_VERSION);
+ if ((revision != FREEZE_CSR_SUPPORTED_VERSION) &&
+ (revision != FREEZE_CSR_OFFICIAL_VERSION)) {
+ dev_err(dev,
+ "%s unexpected revision 0x%x != 0x%x != 0x%x\n",
+ __func__, revision, FREEZE_CSR_SUPPORTED_VERSION,
+ FREEZE_CSR_OFFICIAL_VERSION);
+ return -EINVAL;
+ }
+
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->dev = dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- priv->base_addr = devm_ioremap_resource(dev, res);
- if (IS_ERR(priv->base_addr))
- return PTR_ERR(priv->base_addr);
-
- status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
+ status = readl(base_addr + FREEZE_CSR_STATUS_OFFSET);
if (status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE)
priv->enable = 1;
- revision = readl(priv->base_addr + FREEZE_CSR_REG_VERSION);
- if (revision != FREEZE_CSR_SUPPORTED_VERSION)
- dev_warn(dev,
- "%s Freeze Controller unexpected revision %d != %d\n",
- __func__, revision, FREEZE_CSR_SUPPORTED_VERSION);
+ priv->base_addr = base_addr;
return fpga_bridge_register(dev, FREEZE_BRIDGE_NAME,
&altera_freeze_br_br_ops, priv);