diff options
| author | Rashmica Gupta <rashmica.g@gmail.com> | 2019-09-06 08:26:44 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-09-11 12:08:59 +0200 |
| commit | 3d64a5a742ac95f2e6384605ea2825aa1c17e575 (patch) | |
| tree | 066a951385b45153b1120acb6f4039fb8adcbd1a /drivers/gpio/gpio-aspeed.c | |
| parent | gpio/aspeed: Fix incorrect number of banks (diff) | |
| download | linux-3d64a5a742ac95f2e6384605ea2825aa1c17e575.tar.xz linux-3d64a5a742ac95f2e6384605ea2825aa1c17e575.zip | |
gpio: aspeed: Setup irqchip dynamically
This is in preparation for adding ast2600 support. The ast2600 SoC
requires two instances of the GPIO driver as it has two GPIO
controllers. Each instance needs it's own irqchip.
Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
Link: https://lore.kernel.org/r/20190906062644.13445-1-rashmica.g@gmail.com
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-aspeed.c')
| -rw-r--r-- | drivers/gpio/gpio-aspeed.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 854ed3bc66a7..0da4cc786b99 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -52,6 +52,7 @@ struct aspeed_gpio_config { */ struct aspeed_gpio { struct gpio_chip chip; + struct irq_chip irqc; spinlock_t lock; void __iomem *base; int irq; @@ -681,14 +682,6 @@ static void aspeed_gpio_irq_handler(struct irq_desc *desc) chained_irq_exit(ic, desc); } -static struct irq_chip aspeed_gpio_irqchip = { - .name = "aspeed-gpio", - .irq_ack = aspeed_gpio_irq_ack, - .irq_mask = aspeed_gpio_irq_mask, - .irq_unmask = aspeed_gpio_irq_unmask, - .irq_set_type = aspeed_gpio_set_type, -}; - static void aspeed_init_irq_valid_mask(struct gpio_chip *gc, unsigned long *valid_mask, unsigned int ngpios) @@ -1195,7 +1188,12 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev) gpio->irq = rc; girq = &gpio->chip.irq; - girq->chip = &aspeed_gpio_irqchip; + girq->chip = &gpio->irqc; + girq->chip->name = dev_name(&pdev->dev); + girq->chip->irq_ack = aspeed_gpio_irq_ack; + girq->chip->irq_mask = aspeed_gpio_irq_mask; + girq->chip->irq_unmask = aspeed_gpio_irq_unmask; + girq->chip->irq_set_type = aspeed_gpio_set_type; girq->parent_handler = aspeed_gpio_irq_handler; girq->num_parents = 1; girq->parents = devm_kcalloc(&pdev->dev, 1, |