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authorBrunner Michael <Michael.Brunner@kontron.com>2013-07-31 20:55:39 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-08-16 17:56:53 +0200
commit2e7f6122642773fa467ab80adc30ef20c80dbda6 (patch)
tree032a790961d1c0bc78859d3c21fbbb4937bfbd70 /drivers/gpio/gpio-kempld.c
parentgpio: pca953x: fix gpio input on gpio offsets >= 8 (diff)
downloadlinux-2e7f6122642773fa467ab80adc30ef20c80dbda6.tar.xz
linux-2e7f6122642773fa467ab80adc30ef20c80dbda6.zip
gpio: Fix bit masking in Kontron PLD GPIO driver
This patch fixes the bit masking within the GPIO driver. The masking is basically done twice which causes the wrong GPIOs to be addressed. Signed-off-by: Michael Brunner <michael.brunner@kontron.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-kempld.c')
-rw-r--r--drivers/gpio/gpio-kempld.c24
1 files changed, 9 insertions, 15 deletions
diff --git a/drivers/gpio/gpio-kempld.c b/drivers/gpio/gpio-kempld.c
index 3f0e13b05953..efdc3924d7df 100644
--- a/drivers/gpio/gpio-kempld.c
+++ b/drivers/gpio/gpio-kempld.c
@@ -46,9 +46,9 @@ static void kempld_gpio_bitop(struct kempld_device_data *pld,
status = kempld_read8(pld, reg);
if (val)
- status |= (1 << bit);
+ status |= KEMPLD_GPIO_MASK(bit);
else
- status &= ~(1 << bit);
+ status &= ~KEMPLD_GPIO_MASK(bit);
kempld_write8(pld, reg, status);
}
@@ -60,7 +60,7 @@ static int kempld_gpio_get_bit(struct kempld_device_data *pld, u8 reg, u8 bit)
status = kempld_read8(pld, reg);
kempld_release_mutex(pld);
- return !!(status & (1 << bit));
+ return !!(status & KEMPLD_GPIO_MASK(bit));
}
static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset)
@@ -69,8 +69,7 @@ static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset)
= container_of(chip, struct kempld_gpio_data, chip);
struct kempld_device_data *pld = gpio->pld;
- return kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL_NUM(offset),
- KEMPLD_GPIO_MASK(offset));
+ return kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL_NUM(offset), offset);
}
static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -80,8 +79,7 @@ static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
struct kempld_device_data *pld = gpio->pld;
kempld_get_mutex(pld);
- kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset),
- KEMPLD_GPIO_MASK(offset), value);
+ kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value);
kempld_release_mutex(pld);
}
@@ -92,8 +90,7 @@ static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
struct kempld_device_data *pld = gpio->pld;
kempld_get_mutex(pld);
- kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset),
- KEMPLD_GPIO_MASK(offset), 0);
+ kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset), offset, 0);
kempld_release_mutex(pld);
return 0;
@@ -107,10 +104,8 @@ static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
struct kempld_device_data *pld = gpio->pld;
kempld_get_mutex(pld);
- kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset),
- KEMPLD_GPIO_MASK(offset), value);
- kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset),
- KEMPLD_GPIO_MASK(offset), 1);
+ kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value);
+ kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset), offset, 1);
kempld_release_mutex(pld);
return 0;
@@ -122,8 +117,7 @@ static int kempld_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
= container_of(chip, struct kempld_gpio_data, chip);
struct kempld_device_data *pld = gpio->pld;
- return kempld_gpio_get_bit(pld, KEMPLD_GPIO_DIR_NUM(offset),
- KEMPLD_GPIO_MASK(offset));
+ return kempld_gpio_get_bit(pld, KEMPLD_GPIO_DIR_NUM(offset), offset);
}
static int kempld_gpio_pincount(struct kempld_device_data *pld)