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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2020-04-08 17:41:54 +0200
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2020-04-16 19:41:06 +0200
commit6b1c7837af0e29ad630f0ae18634f6c58a3381ee (patch)
tree23e70b8a3fbc74d4392867f08a54a957bc2898c1 /drivers/gpio/gpio-merrifield.c
parentgpio: pch: Use in pch_irq_type() macros provided by IRQ core (diff)
downloadlinux-6b1c7837af0e29ad630f0ae18634f6c58a3381ee.tar.xz
linux-6b1c7837af0e29ad630f0ae18634f6c58a3381ee.zip
gpio: merrifield: Switch over to MSI interrupts
Some devices may support MSI interrupts. Let's at least try to use them in platforms that provide MSI capability. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/gpio/gpio-merrifield.c')
-rw-r--r--drivers/gpio/gpio-merrifield.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c
index 48918a016cd8..11e6ea70568a 100644
--- a/drivers/gpio/gpio-merrifield.c
+++ b/drivers/gpio/gpio-merrifield.c
@@ -473,6 +473,10 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
raw_spin_lock_init(&priv->lock);
+ retval = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
+ if (retval < 0)
+ return retval;
+
girq = &priv->chip.irq;
girq->chip = &mrfld_irqchip;
girq->init_hw = mrfld_irq_init_hw;
@@ -482,7 +486,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
sizeof(*girq->parents), GFP_KERNEL);
if (!girq->parents)
return -ENOMEM;
- girq->parents[0] = pdev->irq;
+ girq->parents[0] = pci_irq_vector(pdev, 0);
girq->first = irq_base;
girq->default_type = IRQ_TYPE_NONE;
girq->handler = handle_bad_irq;