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| author | John Crispin <blogic@openwrt.org> | 2012-08-16 10:25:42 +0200 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2012-08-23 00:08:18 +0200 |
| commit | f40e1f9d856ec417468c090c4b56826171daa670 (patch) | |
| tree | 473073168643374dfec8caca3199286c85705793 /drivers/gpio/gpio-ml-ioh.c | |
| parent | MIPS: lantiq: falcon clocks were not enabled properly (diff) | |
| download | linux-f40e1f9d856ec417468c090c4b56826171daa670.tar.xz linux-f40e1f9d856ec417468c090c4b56826171daa670.zip | |
MIPS: lantiq: enable pci clk conditional for xrx200 SoC
The xrx200 SoC family has the same PCI clock register layout as the AR9.
Enable the same quirk as for AR9
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4235/
Diffstat (limited to 'drivers/gpio/gpio-ml-ioh.c')
0 files changed, 0 insertions, 0 deletions