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author | Xiongfeng Wang <wangxiongfeng2@huawei.com> | 2019-02-17 04:54:15 +0100 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-02-18 11:27:42 +0100 |
commit | 6c8d750f9784cef32a8cffdad74c8a351b4ca3a6 (patch) | |
tree | 06da47433058ef334c86a52421fbb5e076042e71 /drivers/gpio/gpio-mvebu.c | |
parent | ACPI / CPPC: Add a helper to get desired performance (diff) | |
download | linux-6c8d750f9784cef32a8cffdad74c8a351b4ca3a6.tar.xz linux-6c8d750f9784cef32a8cffdad74c8a351b4ca3a6.zip |
cpufreq / cppc: Work around for Hisilicon CPPC cpufreq
Hisilicon chips do not support delivered performance counter register
and reference performance counter register. But the platform can
calculate the real performance using its own method. We reuse the
desired performance register to store the real performance calculated by
the platform. After the platform finished the frequency adjust, it gets
the real performance and writes it into desired performance register. Os
can use it to calculate the real frequency.
Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
[ rjw: Drop unnecessary braces ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/gpio/gpio-mvebu.c')
0 files changed, 0 insertions, 0 deletions