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authorRobert Jarzmik <robert.jarzmik@free.fr>2015-12-12 23:55:21 +0100
committerLinus Walleij <linus.walleij@linaro.org>2015-12-15 14:16:47 +0100
commita770d946371ec7710cbbcf523fccf8e05ef3927e (patch)
treebd67b13a9102b2cd2d4df0122a77cc7fea31e971 /drivers/gpio/gpio-pxa.c
parentgpio: pl061: add support for wakeup configuration (diff)
downloadlinux-a770d946371ec7710cbbcf523fccf8e05ef3927e.tar.xz
linux-a770d946371ec7710cbbcf523fccf8e05ef3927e.zip
gpio: pxa: add pin control gpio direction and request
If a pin control driver is available, use it to change the gpio direction. If not fallback to directly manipulating the gpio direction register. The reason to use the pin control driver first is that pin control in pxa2xx architecture implies changing the gpio direction, even for non gpio functions. In order to do it atomically, only one driver should control the gpio direction, and if a pin controller is available, it has to be him. There is a small catch : if CONFIG_PINCTRL is selected, then a pinctrl driver has to be probed. If not, gpio_request() will return -EPROBE_DEFER as pinctrl_request_gpio() returns it in that case. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-pxa.c')
-rw-r--r--drivers/gpio/gpio-pxa.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index ccc83faf9275..eacb4b9b2677 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -24,6 +24,7 @@
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/slab.h>
@@ -251,6 +252,11 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
void __iomem *base = gpio_bank_base(chip, offset);
uint32_t value, mask = GPIO_bit(offset);
unsigned long flags;
+ int ret;
+
+ ret = pinctrl_gpio_direction_input(chip->base + offset);
+ if (!ret)
+ return 0;
spin_lock_irqsave(&gpio_lock, flags);
@@ -271,9 +277,14 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
void __iomem *base = gpio_bank_base(chip, offset);
uint32_t tmp, mask = GPIO_bit(offset);
unsigned long flags;
+ int ret;
writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
+ ret = pinctrl_gpio_direction_output(chip->base + offset);
+ if (!ret)
+ return 0;
+
spin_lock_irqsave(&gpio_lock, flags);
tmp = readl_relaxed(base + GPDR_OFFSET);
@@ -318,6 +329,16 @@ static int pxa_gpio_of_xlate(struct gpio_chip *gc,
}
#endif
+static int pxa_gpio_request(struct gpio_chip *chip, unsigned int offset)
+{
+ return pinctrl_request_gpio(chip->base + offset);
+}
+
+static void pxa_gpio_free(struct gpio_chip *chip, unsigned int offset)
+{
+ pinctrl_free_gpio(chip->base + offset);
+}
+
static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio,
struct device_node *np, void __iomem *regbase)
{
@@ -336,6 +357,8 @@ static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio,
pchip->chip.set = pxa_gpio_set;
pchip->chip.to_irq = pxa_gpio_to_irq;
pchip->chip.ngpio = ngpio;
+ pchip->chip.request = pxa_gpio_request;
+ pchip->chip.free = pxa_gpio_free;
#ifdef CONFIG_OF_GPIO
pchip->chip.of_node = np;
pchip->chip.of_xlate = pxa_gpio_of_xlate;