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author | Michal Simek <michal.simek@xilinx.com> | 2018-04-11 15:55:01 +0200 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2018-05-23 11:43:03 +0200 |
commit | 060f3ebf6a9a4a92dd92149e6ebffae10679ed17 (patch) | |
tree | 76666efc35eaf9981d6e98ab72078d397c42f1ca /drivers/gpio/gpio-zynq.c | |
parent | gpio: dwapb: Rework support for 1 interrupt per port A GPIO (diff) | |
download | linux-060f3ebf6a9a4a92dd92149e6ebffae10679ed17.tar.xz linux-060f3ebf6a9a4a92dd92149e6ebffae10679ed17.zip |
gpio: zynq: Setup chip->base based on alias ID
In past Xilinx gpio-zynq driver was setting up gpio chip->base as 0
which was chagned to autodetection when driver was upstreamed. Older
systems, which were using this old version, setup SW stack which expects
zynq gpio base as 0 and right now there is no way how to set this up.
The patch is adding an option to setup chip->base based on aliases which
is something what some other drivers are doing too.
It means when gpio0 alias is setup then chip->base is 0. When gpio alias
is not setup gpiochip_find_base() set it up properly which is current
behavior.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-zynq.c')
-rw-r--r-- | drivers/gpio/gpio-zynq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c index 6c61e15cf322..3f5fcdd5a429 100644 --- a/drivers/gpio/gpio-zynq.c +++ b/drivers/gpio/gpio-zynq.c @@ -827,7 +827,7 @@ static int zynq_gpio_probe(struct platform_device *pdev) chip->free = zynq_gpio_free; chip->direction_input = zynq_gpio_dir_in; chip->direction_output = zynq_gpio_dir_out; - chip->base = -1; + chip->base = of_alias_get_id(pdev->dev.of_node, "gpio"); chip->ngpio = gpio->p_data->ngpio; /* Retrieve GPIO clock */ |