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| author | Yong Wu <yong.wu@mediatek.com> | 2019-08-24 05:02:01 +0200 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2019-08-30 15:57:27 +0200 |
| commit | 64fea74a0d205ac9aff39997e5fe9d64115a4bd3 (patch) | |
| tree | 379e10ab000ccfc5de8dfc9684dbeac00e372824 /drivers/gpio | |
| parent | iommu/mediatek: Move vld_pa_rng into plat_data (diff) | |
| download | linux-64fea74a0d205ac9aff39997e5fe9d64115a4bd3.tar.xz linux-64fea74a0d205ac9aff39997e5fe9d64115a4bd3.zip | |
memory: mtk-smi: Add gals support
In some SoCs like mt8183, SMI add GALS(Global Async Local Sync) module
which can help synchronize for the modules in different clock frequency.
It can be seen as a "asynchronous fifo". This is a example diagram:
M4U
|
----------
| |
gals0-rx gals1-rx
| |
| |
gals0-tx gals1-tx
| |
------------
SMI Common
------------
|
+-----+--------+-----+- ...
| | | |
| gals-rx gals-rx |
| | | |
| | | |
| gals-tx gals-tx |
| | | |
larb1 larb2 larb3 larb4
GALS only help transfer the command/data while it doesn't have the
configuring register, thus it has the special "smi" clock and doesn't
have the "apb" clock. From the diagram above, we add "gals0" and
"gals1" clocks for smi-common and add a "gals" clock for smi-larb.
This patch adds gals clock supporting in the SMI. Note that some larbs
may still don't have the "gals" clock like larb1 and larb4 above.
This is also a preparing patch for mt8183 which has GALS.
CC: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/gpio')
0 files changed, 0 insertions, 0 deletions