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authorVitaly Prosyak <vitaly.prosyak@amd.com>2015-12-11 19:38:58 +0100
committerAlex Deucher <alexander.deucher@amd.com>2016-02-10 22:14:57 +0100
commit58c3ce23c92aa75e9b5d0ddb5cb20ffa29b1f809 (patch)
tree76c9f07a7efb213bb75d6c880bc5e1ae034f9996 /drivers/gpu/drm/amd
parentdrm/amd/powerplay: Make declarations of functions exposed to DAL type-safe. (diff)
downloadlinux-58c3ce23c92aa75e9b5d0ddb5cb20ffa29b1f809.tar.xz
linux-58c3ce23c92aa75e9b5d0ddb5cb20ffa29b1f809.zip
drm/amd/powerplay: Use engine clock limit calculated by dal
Use min required system clock calculated by dal Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 031d255eb6fc..cf037b7bb6d8 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -715,7 +715,6 @@ static int cz_tf_update_sclk_limit(struct pp_hwmgr *hwmgr,
unsigned long clock = 0;
unsigned long level;
unsigned long stable_pstate_sclk;
- struct PP_Clocks clocks;
unsigned long percentage;
cz_hwmgr->sclk_dpm.soft_min_clk = table->entries[0].clk;
@@ -726,8 +725,9 @@ static int cz_tf_update_sclk_limit(struct pp_hwmgr *hwmgr,
else
cz_hwmgr->sclk_dpm.soft_max_clk = table->entries[table->count - 1].clk;
- /*PECI_GetMinClockSettings(pHwMgr->pPECI, &clocks);*/
- clock = clocks.engineClock;
+ clock = hwmgr->display_config.min_core_set_clock;
+ if (clock == 0)
+ printk(KERN_ERR "[ powerplay ] min_core_set_clock not set\n");
if (cz_hwmgr->sclk_dpm.hard_min_clk != clock) {
cz_hwmgr->sclk_dpm.hard_min_clk = clock;