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authorBoris Brezillon <boris.brezillon@free-electrons.com>2015-02-06 16:04:08 +0100
committerBoris Brezillon <boris.brezillon@free-electrons.com>2015-02-24 11:45:11 +0100
commitbd4248bb5e8b41f88a2789ee124dce3e9ec4f227 (patch)
tree2dd81b368016abfdff0d93ce12184f33352d12d9 /drivers/gpu/drm/atmel-hlcdc
parentMerge tag 'drm-amdkfd-fixes-2015-02-23' of git://people.freedesktop.org/~gabb... (diff)
downloadlinux-bd4248bb5e8b41f88a2789ee124dce3e9ec4f227.tar.xz
linux-bd4248bb5e8b41f88a2789ee124dce3e9ec4f227.zip
drm: atmel-hlcdc: reset layer A2Q and UPDATE bits when disabling it
The A2Q (Add To Queue) and UPDATE bits are left in their previous state when resetting the layer. This lead to weird behavior when enabling the plane again: the framebuffer previously queued is dequeued and we end up with access to an old memory region. Reset those bits when resetting the channel. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/gpu/drm/atmel-hlcdc')
-rw-r--r--drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
index 063d2a7b941f..e79bd9ba474b 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
@@ -311,7 +311,8 @@ int atmel_hlcdc_layer_disable(struct atmel_hlcdc_layer *layer)
/* Disable the layer */
regmap_write(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_CHDR,
- ATMEL_HLCDC_LAYER_RST);
+ ATMEL_HLCDC_LAYER_RST | ATMEL_HLCDC_LAYER_A2Q |
+ ATMEL_HLCDC_LAYER_UPDATE);
/* Clear all pending interrupts */
regmap_read(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_ISR, &isr);