diff options
| author | David Jander <david@protonic.nl> | 2023-07-21 18:53:28 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2023-07-21 21:29:52 +0200 |
| commit | 85a241cb128ac449b301d5b7da16a7c11f5fc094 (patch) | |
| tree | d9f290827157211b6b5423e7b020d7f26ad95212 /drivers/gpu/drm/bridge/tc358767.c | |
| parent | drm/bridge: tc358767: increase PLL lock time delay (diff) | |
| download | linux-85a241cb128ac449b301d5b7da16a7c11f5fc094.tar.xz linux-85a241cb128ac449b301d5b7da16a7c11f5fc094.zip | |
drm/bridge: tc358767: give VSDELAY some positive value
The documentation is not clear about how this delay works.
Empirical tests have shown that with a VSDELAY of 0, the first
scanline is not properly formatted in the output stream when
DSI->DP mode is used. The calculation spreadsheets from Toshiba
seem to always make this value equal to the HFP + 10 for DSI->DP
use-case. For DSI->DPI this value should be > 2 and for DPI->DP
it seems to always be 0x64.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marek Vasut <marex@denx.de> # TC9595
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230721165328.3968759-2-l.stach@pengutronix.de
Diffstat (limited to 'drivers/gpu/drm/bridge/tc358767.c')
| -rw-r--r-- | drivers/gpu/drm/bridge/tc358767.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 40d52f6f073c..b45bffab7c81 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -817,7 +817,7 @@ static int tc_set_common_video_mode(struct tc_data *tc, * sync signals */ ret = regmap_write(tc->regmap, VPCTRL0, - FIELD_PREP(VSDELAY, 0) | + FIELD_PREP(VSDELAY, right_margin + 10) | OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED); if (ret) return ret; |