diff options
author | Shirish S <s.shirish@samsung.com> | 2014-03-13 06:28:27 +0100 |
---|---|---|
committer | Inki Dae <daeinki@gmail.com> | 2014-03-23 16:36:26 +0100 |
commit | e1d883c0e64b07c080150f6b753b6bf69674b355 (patch) | |
tree | 9a8f9c23607b33ec425753f1867df0ed777b0b03 /drivers/gpu/drm/exynos/exynos_hdmi.c | |
parent | drm/exynos: Fix (more) freeing issues in exynos_drm_drv.c (diff) | |
download | linux-e1d883c0e64b07c080150f6b753b6bf69674b355.tar.xz linux-e1d883c0e64b07c080150f6b753b6bf69674b355.zip |
drm/exynos: add phy settings for RB resolutions
This patch adds support for the below mentioned
pixel clocks in Exynos5250.
Without them, following display modes won¡¯t
be supported:
71 MHz - 1280x800@60Hz RB
73.25 MHz - 800x600@120Hz RB
88.75 MHz - 1440x900@60Hz RB
115.5 MHz - 1024x768@120Hz RB
119 MHz - 1680x1050@60Hz RB
Signed-off-by: Shirish S <s.shirish@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to '')
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_hdmi.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index c021ddc1ffb4..135c9c9e2f3c 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -303,6 +303,24 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = { }, }, { + .pixel_clock = 71000000, + .conf = { + 0x01, 0x91, 0x1e, 0x15, 0x40, 0x3c, 0xce, 0x08, + 0x04, 0x20, 0xb2, 0xd8, 0x45, 0xa0, 0xac, 0x80, + 0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, + 0x54, 0xad, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 73250000, + .conf = { + 0x01, 0xd1, 0x1f, 0x15, 0x40, 0x18, 0xe9, 0x08, + 0x02, 0xa0, 0xb7, 0xd8, 0x45, 0xa0, 0xac, 0x80, + 0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, + 0x54, 0xa8, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { .pixel_clock = 74176000, .conf = { 0x01, 0xd1, 0x3e, 0x35, 0x40, 0x5b, 0xde, 0x08, @@ -330,6 +348,15 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = { }, }, { + .pixel_clock = 88750000, + .conf = { + 0x01, 0x91, 0x25, 0x17, 0x40, 0x30, 0xfe, 0x08, + 0x06, 0x20, 0xde, 0xd8, 0x45, 0xa0, 0xac, 0x80, + 0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, + 0x54, 0x8a, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { .pixel_clock = 106500000, .conf = { 0x01, 0xd1, 0x2c, 0x12, 0x40, 0x0c, 0x09, 0x08, @@ -348,6 +375,24 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = { }, }, { + .pixel_clock = 115500000, + .conf = { + 0x01, 0xd1, 0x30, 0x1a, 0x40, 0x40, 0x10, 0x04, + 0x04, 0xa0, 0x21, 0xd9, 0x45, 0xa0, 0xac, 0x80, + 0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, + 0x54, 0xaa, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 119000000, + .conf = { + 0x01, 0x91, 0x32, 0x14, 0x40, 0x60, 0xd8, 0x08, + 0x06, 0x20, 0x2a, 0xd9, 0x45, 0xa0, 0xac, 0x80, + 0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, + 0x54, 0x9d, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80, + }, + }, + { .pixel_clock = 146250000, .conf = { 0x01, 0xd1, 0x3d, 0x15, 0x40, 0x18, 0xfd, 0x08, |